MIMO Software Radio with OFDM PHY

Introduction
The major thrust of the efforts from MPRG is on implementing multiple-input-multiple-output (MIMO) techniques on the SDR-3000 and developing a complete modem that will demonstrate the performance enhancement through the use of the MIMO techniques. The implementation effort is built on three development phases: base-band simulation, IF-stage simulation, and RF-stage integration.

Base-band simulation
The base-band simulation effort involves developing the required software to implement MIMO algorithms. This effort includes validation of the different components of the system as well as the complete system. We have chosen the physical layer (PHY) of IEEE802.11a standard, which is OFDM based, as the signaling format since this version of the WLAN standard is being widely deployed. The software is developed on ANSI C so that the developed code can be easily ported on to the SDR-3000 testbed.

The base-band simulator contains three major components of the 802.11a based modem: transmitter, propagation channel, and the receiver. The transmitter includes the following signal conditioning functions:

1. Convolution encoder of rate 1/2, 2/3, and 3/4

2. Interleaver

3. BPSK and QPSK modulator

4. Symbol generator that adds the short and long training sequence, pilot symbols, does the IFFT operation and adds the cyclic prefix to generate each symbol (OFDM section)

5. Up-sampler and frequency up-converter to generate the required IF signal

6. Digital to analog converter

Functions 5 and 6 implement IF stage operation. The modulated OFDM symbols are transmitted through the propagation channel. The channels are modeled as additive white Gaussian noise (AWGN) or Rayleigh faded channel. Since the system is using multiple antenna elements, independent channels are generated for each transmit-receive antenna element pair.

The 802.11a receiver functions include:

1. Analog to digital converter running at 65 MSPS
2. Digital down-conversion and down-sampler
3. Burst detection logic
4. Channel estimator using the long training sequence and MRC combiner
5. FFT operation and data extraction
6. BPSK and QPSK demodulator
7. De-interleaver
8. Viterbi decoder

The various functions in the transmitter and the receiver were tested and validated. The complete system level simulation at the base-band was done with 1 transmit antenna and two receive antenna. The receiver used maximal ratio combining (MRC) on the received signals from the two-antenna elements. The bit error rate (BER) performance of the system is shown in Figure 1.

Figure 1. Base-band BER performance

The BER plots from the figure reveal that the performance improvement through MRC technique for AWGN and Rayleigh fading channels. The performance improvement is prominent for Rayleigh fading channels. Rayleigh fading channels are a more realistic representation of propagation channel when the direct or line of sight (LOS) path is blocked between the transmitter and the receiver.

IF Stage Simulation:
The IF stage simulation includes all the functionalities of the base-band simulation as well as the digital-to-analog conversion, and analog-to-digital conversion at the transmitter and receiver, respectively. The IF stage at the transmitter includes up-sampling during the digital-to-analog conversion process, and finally up-conversion to an IF signal. The IF stage at the receiver includes down-conversion from an IF signal to base-band and analog-to-digital conversion, and finally down-sampling to generate the required base-band symbols.

The up-conversion is done in 2 steps:

1. Up-sample the given base-band signal by a factor of 3 using interpolation.

2. Change the center frequency to 16.25 MHz by multiplying it with a complex signal corresponding to 16.25 MHz at 65 MHz sampling rate.

Figure 2. Up-conversion steps

The up-conversion process is shown graphically in Figure 2. The basic input frame, shown in pink line, is filtered and up-sampled to generate the signal in blue color. The up-sampled signal is then up-converted to produce the resulting IF signal at 16.25 MHz.


The digital down conversion (DDC) at the receiver is also done in two steps:

1. Multiply the received signal with complex signal corresponding to -16.25MHz. This gives the base band signal that contains over-sampling by a factor of 3.

2. Decimate the signal to get the required base band sampling rate.

Figure 3. Steps in digital down-conversion

The DDC process is illustrated in Figure 3. The received IF signal, shown in blue, is down-converted (red signal) and then filtered to generate the base-band signal (shown in green). The receiver also has a burst detection logic. A two-window ratio algorithm is used to detect the burst.

The composite system at IF level has been verified in simulation and performance assessed. Figure 4. shows the BER performance of the system including IF up- and down-conversion.

Figure 4. BER plot for simulation with IF

From Figure 4., it can be seen that the two-element receiver performs better than the single antenna system as shown in Figure 1. The trend of the BER curves also hold except for a linear translation of the x-axis (SNR scale) by about 14 dB. This is attributed to the SNR scaling when IF up- and down-conversion is used on the base-band signal.

RF stage:
The base-band processing of the complete system is done internally at the SDR-3000 testbed. The RF stage is added to the SDR-3000 system to facilitate over-the-air (OTA) transmission and testing of the 802.11a PHY signals. A two-stage up- and down-conversion is planned for a carrier frequency of 2.05 GHz at the transmitter and the receiver, respectively. External RF front-ends are being tested for supporting up- and down-conversion. The VT-STAR transmitter RF front end will be used for RF up-conversion. The digital-to-analog converter (DAC) delivers IF signal at 16.25 MHz (up-converted and sampled) to the VT-STAR transmitter. Signia 9136, a four-channel RF front end, down-converts the 2.05 GHz RF to 16.25 MHz IF signal. The analog IF signal is sampled by the analog-to-digital converter (ADC) at 64 MSPS.